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IC37首页 > 元器件 > eof > XC6SLX45-3CSG484I国宇航芯北京军工IC订货13632767652

XC6SLX45-3CSG484I国宇航芯北京军工IC订货13632767652

公司名称:
深圳市华沣恒霖电子科技有限公司
价  格:
1000
订货量:
(100):>=100
发货地点:
广东省/深圳
产品类别:
eof
更新时间:
2019-01-17

商品详情

XC6SLX45-3CSG484I

FPGA Spartan-6 LX Family 43661 Cells 45nm (CMOS) Technology 1.2V 484-Pin CSBGA

The Spartan®-6 family provides leading system integration capabilities with the lowest total cost for high-volume applications. The thirteen-member family delivers expanded densities ranging from 3,840 to 147,443 logic cells, with half the power consumption of previous Spartan families, and faster, more comprehensive connectivity. Built on a mature 45 nm low-power copper process technology that delivers the optimal balance of cost, power, and performance, the Spartan-6 family offers a new, more efficient, dual-register 6-input lookup table (LUT) logic and a rich selection of built-in system-level blocks. These include 18 Kb (2 x 9 Kb) block RAMs, second generation DSP48A1 slices, SDRAM memory controllers, enhanced mixed-mode clock management blocks, SelectIO technology, poweroptimized high-speed serial transceiver blocks, PCI Express® compatible Endpoint blocks, advanced system-level power management modes, auto-detect configuration options, and enhanced IP security with AES and Device DNA protection. These features provide a lowcost programmable alternative to custom ASIC products with unprecedented ease of use. Spartan-6 FPGAs offer the best solution for high-volume logic designs, consumer-oriented DSP designs, and cost-sensitive embedded applications. Spartan-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components that enable designers to focus on innovation as soon as their development cycle begins.

技术参数

  • Spartan-6 LX FPGA: Logic optimized

  • Designed for low cost

  • Multiple efficient integrated blocks

  • Optimized selection of I/O standards

  • Staggered pads

  • High-volume plastic wire-bonded packages

  • Low static and dynamic power

  • 45 nm process optimized for cost and low power

  • Hibernate power-down mode for zero power

  • Suspend mode maintains state and configuration with multi-pin wake-up, control enhancement

  • Multi-voltage, multi-standard SelectIO™ interface banks

  • Up to 1,080 Mb/s data transfer rate per differential I/O

  • Selectable output drive, up to 24 mA per pin

  • 3.3V to 1.2V I/O standards and protocols

  • Low-cost HSTL and SSTL memory interfaces

  • Hot swap compliance

  • Adjustable I/O slew rates to improve signal integrity

  • High-speed GTP serial transceivers in the LXT FPGAs

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供应商信息

  • 公司:深圳市华沣恒霖电子科技有限公司
  • 联系人:黄云艳
  • 电话:086-0755-84829291
  • 手机:13632767652
  • 传真:086-0755-82286633
  • Email:1256290132@qq.com
  • QQ:956145708
  • 地址:深圳市龙华区民治光浩国际中心一期16F
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