ADS5409IZAY

AD9613是双12位模数转换器（ADC）。

采样速度可达250 MSPS。AD9613的设计

支持低成本、小规模的通信应用

尺寸，宽频带，和多功能性是需要的。

双ADC内核具有多级、差分流水线结构。

具有集成输出纠错逻辑的体系结构。各

ADC具有支持多种用户可选的宽带输入

输入范围。集成电压基准简化设计

考虑事项。提供一个占空比稳定器（DCS）。

补偿ADC时钟占空比的变化，

使变频器保持良好的性能。

ADC输出数据直接路由到两个外部12位。

LVDS输出端口并格式化为交织或通道

多路复用。

灵活的掉电选项允许显著的功率节省，

当需要时。

ADS5409IZAY

DESCRIPTIONThe ADS5409 is a high linearity dual channel 12-bit, • Dual Channel900 Msps analog-to-digital converter (ADC) easing• 12-Bit Resolution front end filter design for wide bandwidth receivers.• Maximum Clock Rate: 900 Msps The analog input buffer isolates the internal switching• Low Swing Full-Scale Input: 1.0 Vpp of the on-chip track-and-hold from disturbing thesignal source as well as providing a high-impedance• Analog Input Buffer with High Impedance Input input. Optionally the output data can be decimated by• Input Bandwidth (3dB): >1.2GHz two. Designed for high SFDR, the ADC has low-noise• Data Output Interface: DDR LVDS performance and outstanding spurious-free dynamicrange over a large input-frequency range. The device • Optional 2x Decimation with Low Pass or High is available in a 196pin BGA package and is specified Pass Filterover the full industrial temperature range (–40°C to• 196-Pin BGA Package (12x12mm) 85°C).• KEY SPECIFICATIONS– Power Dissipation: 1.1W/ch– Spectral Performance at fin = 230 MHz IF– SNR: 61.0 dBFS– SFDR: 76 dBc– Spectral Performance at fin = 700 MHz IF– SNR: 59.4 dBFS– SFDR: 70 dBcAPPLICATIONS• Test and Measurement Instrumentation• Ultra-Wide Band Software Defined RadioNumber of Device Part No. Speed Grade • Data Acquisition Channels• Power Amplifier Linearization ADS5402 2 800Msps• Signal Intelligence and Jamming ADS5401 1 800Msps• Radar and Satellite Systems ADS5404 2 500MspsADS5403 1 500Msps • Microwave ReceiversADS5407 2 500Msps • Cable InfrastructureADS5409 2 900Msps

ADS5409IZAY